FIG. 3 is a perspective view showing the structure of a conventionally known chip solid electrolyte capacitor, where one solid electrolyte capacitor element (2) obtained by sequentially forming a dielectric oxide film layer, a semiconductor layer and an electrically conducting layer on a surface of a sintered body comprising a valve-acting metal or an electrically conducting oxide is used and where a part of the electrically conducting layer and an anode lead (4a) (anode part) connected to the sintered body are laid on a pair of oppositely disposed end parts (1a and 1b) which are a part of a plate-like metal-made lead frame (1) working out to external terminals, each is electrically or mechanically connected, the entirety is molded with a jacket resin while leaving outside only the external terminals of the lead frame to form a jacket part (5), and the lead frame outside the jacket part is cut and bent at predetermined portions.
On the other hand, with recent progress of high-frequency processing of electronic instruments, the solid electrolyte capacitor is also demanded to have good high-frequency performance. The present inventors have already proposed in JP-A-5-234829 (the term “JP-A” as used herein means an “unexamined published Japanese patent application”) a chip solid electrolyte capacitor exhibiting good high-frequency performance values, where a plurality of solid electrolyte capacitor elements each obtained by sequentially stacking a dielectric oxide film layer, a semiconductor layer and an electrically conducting layer to form a cathode part on a surface of an anode substrate having an anode part and comprising a valve-acting metal are used and where the cathode parts are partially laid in parallel with no space on one end part of a lead frame having a pair of oppositely disposed end parts, the anode parts are laid on another end part, each is electrically or mechanically joined, the entirety is molded with a resin while leaving outside a part of end parts of the lead frame, and the lead frame outside the resin molding is cut and bent at predetermined portions.
The chip solid electrolyte capacitor is integrated on a substrate together with other electronic parts, then mounted on an electronic instrument and used for multiple years. The chip solid electrolyte capacitor is demanded to exhibit an initial failure ratio as low as possible at the stage of being integrated on a substrate.